Design FPGA systems for Kepler Communications’ satellites using RTL development and digital signal processing or embedded interfaces. This contract is based in Toronto.
Kepler Communications seeks an FPGA Digital Design Engineer for a 6+ month contract developing next-generation satellite systems. You will create FPGA code for software-defined radio modulation and demodulation or processor and peripheral interfaces. The work spans simulation, synthesis, place and route, timing closure, and hardware testing. You will contribute to communications and network architecture for future satellite constellations.
Key Responsibilities: Develop custom IP for satellite digital payload features
Improve DSP and interface designs for reliability
Integrate functionality from IP core vendors
Support communications and network architecture development
Participate in current spacecraft conceptual design studies
Requirements: Bachelor’s degree in computer or electrical engineering
Five or more years of FPGA or RTL design experience
Experience with Verilog, SystemVerilog, or VHDL
Experience with Xilinx Zynq and UltraScale FPGAs
Knowledge of timing, scripting, and FPGA development tools
Apply FPGA, RTL, DSP, timing closure, and hardware testing expertise to Kepler satellite communications systems.