DDR Validation Lead, Staff (Canada)

DDR Validation Lead, Staff (Canada)

25 Oct
|
QUALCOMM
|
Canada

25 Oct

QUALCOMM

Canada

Qualcomm Technologies, Inc. Engineering Group, Engineering Group ASICS Engineering Qualcomm’s System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre
- and post-silicon phases. This team focuses on content quality and system-level validation enablement, offering deep exposure to Qualcomm SoCs through bare-metal validation content, scalable automation frameworks, and complex system debugs. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains. Data center AI Accelerator platform Seeking an experienced DDR Validation Lead to drive end-to-end validation of next-generation LPDDR5X and LPDDR6 memory subsystems on AI Accelerator and Flagship mobile platforms. This role will lead memory bring-up, performance validation, system stress, debug, and production readiness from pre-silicon through post-silicon phases. Drive LPDDR5X/LPDDR6 bring-up, training validation, frequency scaling, low-power state validation, and feature enablement. Develop and execute validation plans covering memory functionality, performance, reliability, power, and corner-case scenarios. Validate interactions between DDR, CPU, GPU, NPU, cache hierarchy, NoC, and system software. Drive bandwidth, latency, QoS, memory pressure, and AI workload characterization. BS or MS or PhD in EE, CE, CS, or related field. Memory training and calibration algorithms Cache, coherency, and NoC architectures Proficiency in C/C++ and low-level software development. Mobile SoC, AI compute, automotive, or server platform validation experience. Familiarity with SI/PI analysis, memory performance tuning, and thermal characterization. Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design,



verification, validation, integration, or related work experience. Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. We also offer a competitive annual discretionary bonus program and prospect for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.
Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities.

📌 DDR Validation Lead, Staff (Canada)
🏢 QUALCOMM
📍 Canada

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