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This role is for an existing vacancy.
Job Description The Design Architect Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications. The Design Architect Analog IC Designer contributes to the design of long-reach Ser Des.
Candidate’s background should include a minimum of 10 years of experience in the development of CMOS Ser Des or high-speed I/O IC
Must have a thorough understanding of jitter and signal equalization techniques
Proficient design experience in most of the following Ser Des circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators
Excellent problem-solving skills, valuable communication skills, and ability to work cooperatively in a team environment
Working knowledge of a set of common Ser Des standards and their electrical requirements is a plus
Position requires proficiency in using CAD tools for circuit simulation, and post-layout verification. Proficiency with layout entry a plus
Cadence tool experience, lab test experience, and design experience at ≥16 Gbps and in ≤16nm technologies
MS or Ph D in EE
Description De L’Emploi L’Architecte en Conception de Circuits Intégrés Analogiques est responsable de la conception et du développement de circuits analogiques/mixtes, de l'architecture et de la spécification initiale jusqu'à la vérification finale de la conformité aux spécifications du client. L’Architecte en Conception contribue à la conception de Ser Des (Serialiseur/Deserialiseur) de longue portée.




Le candidat doit avoir au minimum 10 ans d'expérience dans le développement de circuits intégrés CMOS Ser Des.
Doit avoir une compréhension approfondie du jitter et des techniques d'égalisation du signal.
Expérience dans la conception de la plupart des blocs de circuits Ser Des : TX, RX, sérialiseur, désérialiseur, interpolateur de phase, PLL, distribution d’horloge à haute vitesse, ADC et DAC, circuits de polarisation et de référence de tension (Bandgap), et régulateurs de tension.
Excellentes compétences en résolution de problèmes, bonnes capacités de communication et aptitude à travailler en équipe.
Une connaissance pratique d’un ensemble de normes Ser Des courantes et de leurs exigences électriques est un atout.
Le poste nécessite la maîtrise des outils CAD pour la simulation de circuits et la vérification post-layout. La maîtrise de layout est un plus.
Une expérience avec les outils Cadence, les tests en laboratoire, ainsi que la conception à des vitesses ≥16 Gbps et dans des technologies ≤16 nm.
Diplôme de M. Sc ou Ph. D. en génie électrique.
The annual salary range for Canada is 156,800.00 - 291,200.00 CAD Annual. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
Our perks programs include: paid vacation and holidays, leave of absence programs, Registered Retirement Savings Plan (RRSP), Tax Free Savings (TFSA) plan for post-tax investment savings, Employee Stock Purchase Plan, group health coverage that includes dental, vision and Emotional Wellbeing Support (EAP) benefits for you and your eligible dependents. Cadence also offers employee and dependent Life insurance, and short-term and long-term disability. In addition, Cadence provides Global Travel Medical coverage, Business Travel Accident Insurance, and a funded Lifestyle Spending

📌 Design architect analog ic designer (Quebec City)
🏢 Cadence
📍 Quebec City