Elevate your career with Qualcomm as an ASIC Design Verification Engineer in Vancouver, British Columbia, or remotely. Work on cutting-edge verification methodologies, including SystemVerilog-UVM, to drive the innovation of next-generation technologies. In this pivotal role, you will manage the entire verification lifecycle, focusing on digital power IP's from test planning to post-silicon support.

Bring your 2+ years of experience in ASIC design and verification techniques to develop automation for improved efficiency. This position also seeks talents proficient in SystemVerilog and comfortable with object-oriented programming. Key Responsibilities:

- Plan comprehensive pre-silicon tests for digital power IPs
- Develop advanced testbenches using SystemVerilog-UVM




- Implement coverage development and assertion model techniques
- Enhance verification processes through scripting and automation
- Collaborate in the power-aware UPF verification flow Requirements:
- Bachelor's in Engineering or related field; 2+ years' experience
- Proficiency in SystemVerilog or Verilog and digital design
- Experience with UVM or OVM verification methodologies
- Robust skills in C or C++ programming
- Knowledge of scripting languages like Perl or Python Bring your expertise in ASIC design and verification to Qualcomm and be part of a transformative technology journey.

📌 ASIC Design Verification Engineer at Qualcomm (Vancouver)
🏢 QUALCOMM
📍 Vancouver