Job Responsibility:

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!

- Life at Intel

- Diversity at Intel

As a member of the Layout Team, you will be part of the team designing custom high speed analog layout for industry leading SerDes on Intel's advanced technology. As an Analog Layout Design Engineer in SIPG you will:

- Create bottoms up elements of analog IP design including but not limited to floorplanning blocklevel custom analog layouts, parasitic extractions and schematic to layout verification.
- Debug using phases of physical design development including net parasitic and RVEM estimates, parasitic extraction, layout check verification, and RVEM verification.
- Troubleshoot a wide variety up to and including difficult design issues and applied proactive intervention. Requires expansive knowledge and practical application of methodologies and physical design.
- Participate in developing methodologies and flow efficiencies.
- Work closely with local design engineers and guide Mask Design resources in layout related tasks.

Qualifications

What we need to see (Minimum Qualifications):

- Bachelor's degree in computer engineering, Electrical Engineering, Engineering Science, or any STEM related degree.
- 3+ years' experience or course work with:
- Analog Circuits
- Very Large-Scale Integration (VLSI)
- Semiconductor/PCB Fabrication or Testing

How to Stand out (Preferred Qualifications):

- Experience (including internships) in any/all of the following:



Floor planning (semiconductor or printed circuit board (PCB), Computer aided design (CAD) to assist with RC extraction, optimization, verification; or Semiconductor specific topics: ESD (electrostatic discharge), lithography, EM (electromagnetics), DFM (Design for Manufacturing), Antenna or manufacturing challenges.

The Analog Layout Design Engineer should possess the following behavioral traits.

- Well organized, with good written and oral communication skills.
- Passionate about innovation and end to end ownership.
- Comfort with change and change management, as well as team collaboration with sites worldwide.
- Detail oriented and able to express technical ideas and initiatives clearly in writing or by presentation.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Amazing Advantages!

Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here:

Inside this Business Group

IP Engineering Group's (IPG)



vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here. Annual Salary Range for jobs which could be performed in Canada:CAD 83,110.00-124,470.00 Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

JobType

Hybrid

📌 Analog Layout Design Engineer (Toronto)
🏢 Intel
📍 Toronto