Engineering Group, Engineering Group

Analog Mixed Signal Design

Qualcomm builds industry-leading wired connectivity solutions that enable data to travel faster, more reliably, and with higher performance at lower power. Our technology is embedded in leading-edge semiconductors built to power global network and computer systems. It is an essential part of the core infrastructure enabling next generation services in data centers, artificial intelligence, 5G wireless infrastructure, data networking, autonomous vehicles, and solid-state storage. Replacement Position

Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 4+ years of ASIC design, verification, or related work experience.

OR Master’s degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience.

OR PhD in Electrical Engineering or related field and 2+ of years ASIC design, verification, or related work experience.

We are seeking a highly skilled Cross-Functional Engineer to join our team, focusing on high-speed electrical wireline systems (e.g. The successful candidate will play a critical role in designing, analyzing, and optimizing high-performance interconnects, ensuring accurate analog modelling, mixed-signal system verification, analog calibration, and power estimation working collaboratively with digital verification, firmware, and silicon validation engineers for high-speed SerDes designs.

Collaborate with analog design, digital design, and firmware teams to define and implement calibration algorithms for analog/mixed-signal blocks, optimizing performance and yield

Simulate analog subsystems at higher levels of abstraction to confirm functionality as well as confirm other design characteristics (power, aging performance, EMIR, etc.)





Work closely with digital verification and firmware engineers to ensure proper interaction between analog, digital, and firmware components including register programming, initialization sequences, power-up calibration, power state changes, and data rate changes

Power Estimation: Collaborate with analog and digital program leads to develop and maintain power models that accurately track power dissipation across data rate, operating conditions, and power states of high-speed SerDes, and then correlate post-silicon measurements with these power model predicted results

Technical mentorship: Guide and mentor engineers in analog behavioral modeling, mixed-signal verification techniques, calibration approaches, and power estimation fostering innovation and technical excellence

Proficiency in SystemVerilog and behavioural modeling techniques for analog and mixed-signal designs

Knowledge of calibration algorithms, and equalization techniques for SerDes

Previous experience in either high-speed analog / mixed-signal design or modelling, analog/mixed-signal or digital verification, or post-silicon measurements of complex high-speed wireline systems

Strong understanding of analog design fundamentals, including analog-to-digital and digital-to-analog converters, clock generation and clock distribution, analog equalizers, and transmitter drivers, including the numerous mixed-signal calibrations of these analog building blocks.

Proficiency in digital RTL code (e.g., SystemVerilog language), firmware code (e.g., in C language), and digital verification tools and techniques





Design experience with one or more of the following circuit blocks: continuous time linear equalizer, slicer, high-speed ADC, voltage-controlled oscillator, phase interpolator, bandgap reference, voltage regulator, serializer, deserializer, voltage/current-mode transmitter, phase-locked loop, phase detector

Scripting knowledge (Python, Matlab, etc.) Customer focused

Takes personal pride in high standard of outputs

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