Design next-generation power control systems at Qualcomm Canada ULC using Verilog, System Verilog, and advanced ASIC development practices.This ASIC Digital Design Engineer develops complex RTL for high-performance, low-power products. The work spans architecture, microarchitecture, implementation, and subsystem integration across the VLSI development cycle. Collaboration includes verification, synthesis, physical design, DFT, systems, and software teams.Key Responsibilities: Develop digital designs using Verilog, VHDL, and System VerilogCreate microarchitecture for next-generation power control systemsIntegrate complex subsystems into So C designsCoordinate with multisite leads across United States and IndiaAnalyze reports and run ASIC development toolsRequirements: Five to eight years of digital ASIC front-end design experienceExpertise with complex multi-clock and multi-power-domain RTLExperience with UPF and power-domain crossingFamiliarity with AHB, AXI, SPMI, I2 C, and SPIExpertise in Perl and TCL languagesApply ASIC design expertise, RTL development, and low-power methodology to Qualcomm power control systems.#J-18808-Ljbffr

📌 Asic Digital Design Engineer (Markham)
🏢 Qualcomm
📍 Markham