Overview Company: Qualcomm Canada ULCJob Area: Engineering Group, Engineering Group >

ASICS EngineeringGeneral Summary:QUALCOMM is the world's leading developer of next-generation wireless and multimedia technology. We are searching for an ASIC design engineer interested in developing world-class solutions for the next generation of AI/ML HW IP. New Position

Minimum QualificationsBachelors degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.OR Masters degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Principal Duties

Develop of Micro-Architecture and specification based on high level design requirements

Develop RTL design that meets required performance and is optimized for Area and Power

Integrate pre-verified sub-IPs to build up larger functionality

Flow bring up and report analysis for Linting, RTL Synthesis, CLP, CDC

Work closely with verification team to define testplan, debug regression, analyze coverage reports

Develop SVA assertions for white box verification for formal verification

Effective communication across teams, multitasking and well-planned execution of the tasks.

Preferred Qualifications

Prior experience delivering Verilog and System Verilog RTL

Detail oriented with solid analytical and debugging skills

Strong communication (written and verbal), collaboration, and specification skills

Practiced design knowledge working with some of the following concepts:

Clock domain crossing and reset architecture

Machine Learning HW development

FIFOsimplementation

Busimplementation/verificationtechniques

Memory selection and control

High speed and low power design optimization

Bus interface protocols (AHB, AXI)





Experience with some of the following

Simulation and code coverage tools (VCS, Verdi, Modeltech/Questa, or Xcelium)

Design rule and CDC checking (SVA assertions, Spyglass, 0-in, etc.)

Scripting languages (PERL, Python, TCL, C, etc.)

Power Intent and Analysis: UPF, CLP, PTPX, PowerPro

Synthesis: DCG/NXT, FC

Static Timing: Primetime

Formal Verification: Conformal, Formality

Minimum Qualifications

Legally permitted to work on-site in Canada

5+ years of ASIC design, verification, or related work experience.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may e-mail or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Perks:

$124,200.00 - $174,200.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. Our benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

If you would like more information about this role, please contact Qualcomm Careers.

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📌 Staff Machine Learning Asic Design Engineer (Markham)
🏢 Qualcomm
📍 Markham