25 Gb/s and high accuracy, collaborating with RF, DSP, and packaging teams.You will mentor junior engineers, lead a block on a complex chip, and ensure signal integrity through design reviews and production handoffs in a agile#J-18808-Ljbffr
📌 Senior High-Speed Ams Ic Designer (Hybrid, Ottawa) (Quebec City)
🏢 CISCO
📍 Quebec City
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