Full-time - Multiple Levels - Austin and Santa ClaraNuvacore is building ground-up high performance, low-power CPU for next-generation compute workloads. As DFT engineers within the CPU team you will be responsible for test related pre-silicon and post-silicon activities. We will be delivering a DFT architecture which aligns with the projects industry leading power, performance, and area.THE ROLEAs a CPU DFT Engineer, you will participate in the following areas:Defining and implementing area and power productive DFT architecture while collaborating with design, STA and PDDevelop scan and BIST insertion flows, implement DFT registers in design blocksCompleting DFT architecture specificationsReview and integrate third party IPs into DFT architectureDefine verification plans for DFT featuresReview DFT coverage for scan and MBISTVerification of DFT features in RTL and gates, and power aware simulationsGenerate test content for silicon bringup,



and support silicon bringup activities including yield analysisREQUIREMENTS - MUST TO HAVEBS or MS with 7 years experience in DFT or DFT verificationScan or MBIST with industry standard EDA tools, or experience with DFT verification flowsFor scan role, able to define scan insertion, scan compression, and clking requirements, and define intest and extest modesFor MBIST role, be very familiar with memory repair, and repair interaction with functional operationStrong understanding of JTAG, IEEE 1500 and IEEE 1687Experience with Verilog RTL and gate level netlists, including running and debugging simulationsStrong communication skills and ability to work with cross functional teamsREQUIREMENTS - NICE TO HAVEUsing DFT features to support system debugLeveraging AI tools to accelerate DFT work flowsPorting test content and supporting silicon bringup on ATE platformsExperience in perl, python, or TCL$140,000 - $250,000 a year#J-18808-Ljbffr

📌 Cpu Dft Engineer (Markham)
🏢 NUVACORE
📍 Markham