Lead advanced analog design at SiTime in Ottawa, applying CMOS circuit expertise and system-level thinking to precision timing products. As a Senior Staff Analog Design Engineer, you will provide technical leadership for clock and timing products. The work spans cutting-edge circuit development, PLL building blocks, analog and mixed-signal simulation, and prototype characterization. You will balance performance, schedule, and cost trade-offs while collaborating with test, validation, product engineering, program management, and remote engineering teams. Key Responsibilities:

Define and develop circuits for high-performance timing products Mentor and guide junior analog designers Collaborate with remote engineering teams Support prototype testing,



debugging, and lab characterization Provide technical support through production release Requirements:

Master’s or PhD degree in Electrical Engineering 10+ years in analog or mixed-signal CMOS design Strong integrated circuit design and device physics knowledge PLL, VCO, phase detector, or charge pump experience Cadence simulation and post-layout verification proficiency Apply analog CMOS design, PLL expertise, and technical leadership to SiTime’s advanced timing products in Ottawa.

📌 Senior Staff Analog Design Engineer (Ahuntsic)
🏢 SiTime
📍 Ahuntsic