22 Oct
|
Infosys USA
|
Burnaby
22 Oct
Infosys USA
Burnaby
Required Qualifications:
- Bachelor’s degree or foreign equivalent required from an accredited institution. Will also consider three years of progressive experience in the specialty in lieu of every year of education.
- At least 6 years of Information Technology experience.
Required Skills
- Minimum Qualifications 5+ years of experience in Compiler/Custom Memory Layout design.
- Memory Leafcell layout library design from scratch including top level integration.
- Good knowledge on diAerent types of memory architectures.
- Positive knowledge in optimized layout design for better performance.
- Sound knowledge & hands on experience in Finfet technology, layout design and DRC limitations.
- 3nm, 5 nm exposure required Proficient in physical verification flow & debug, like DRC, LVS, ERC, Boundary conditions.
- Proficient in Cadence Virtuoso layout editor and Calibre physical verification flow.
📌 Technology Lead- Memory Layout (Burnaby)
🏢 Infosys USA
📍 Burnaby