Celero Communications Inc. is seeking a DSP - FEC Design Engineer to advance forward error correction for high-speed optical modems. You will research, design, and simulate FEC schemes, focusing on LDPC and stair-step codes, and validate performance with DSP and ASIC teams.
Robust coding theory and software/hardware modeling are required. The role emphasizes collaboration across DSP, ASIC, and firmware groups to deliver a first product, with a focus on fixed- and floating-point simulations and
📌 Senior FEC DSP Engineer for High-Speed Optical Modems (Vancouver)
🏢 CELERO COMMUNICATIONS
📍 Vancouver
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