NVIDIA is seeking a Senior Mask Layout Design Engineer to join our agile teams in a cross-functional environment focused on high-speed mixed-signal circuit designs. You will perform physical layout for PLLs, high-speed SerDes, and ADCs using Cadence tools, and collaborate with ASIC and mixed-signal engineers for integration in VLSI products.
You should have a BSEE or equivalent with 7+ years in mask/layout, deep analog layout knowledge in submicron CMOS, and proficiency with Cadence Virtuoso