Drive innovation in low power AI at Qualcomm as a Senior ASIC Verification Engineer. Lead cutting-edge solutions for audio and context-aware applications in a energetic team. In this key role, you will contribute to the core verification of next-generation ASICs during both pre and post-silicon phases. With over 4 years of experience in ASIC design and verification, you will drive test plan development and execution while maintaining test benches and functional models. Your expertise in Verilog, VHDL, and SystemVerilog will be crucial for debug activities and providing technical supervision to peers. Key Responsibilities:
- Lead verification tasks for low power AI ASICs
- Develop and execute test plans for design verification
- Maintain scalable test benches and assertions
- Automate development processes for efficiency
- Supervise and guide other engineers in verification methods
Requirements:
- 4+ years of ASIC design/verification experience
- Expert in Verilog/VHDL and hardware verification languages
- Strong understanding of ASIC/VLSI concepts
- Experience with SystemVerilog and digital circuits
- Familiarity with Python and automotive safety standards
Utilize your verification expertise to advance low power AI technology at Qualcomm. #J-18808-Ljbffr