TechBiz Global seeks a Senior DFT and Post-Silicon Lead to drive validation for complex System on Chips. Utilize your expertise in Design for Testability in a remote role. As a Senior DFT and Post-Silicon Lead, you will lead the DFT implementation process for SoCs and SoC chiplets in package. The role demands collaboration with external IP and EDA vendors while delivering high-quality SoCs or SiPs for mass production. Your leadership will foster innovation and efficiency within the DFT and Post-Silicon engineering teams. Key Responsibilities:
- Lead and mentor DFT and Post-Silicon teams
- Implement DFT architectures for improved testability
- Develop and execute test plans at various levels
- Collaborate with cross-functional teams on testing
- Explore recent DFT methodologies for continuous improvement
Requirements:
- Bachelor’s, Master’s, or PhD in relevant fields
- Proven experience with high-performance SoCs
- Strong background in post-silicon test optimization
- Proficiency in SystemVerilog and Verilog
- Hands-on experience with Tessent and SSN methods
Leverage your DFT expertise and leadership in driving innovation at TechBiz Global. #J-18808-Ljbffr