Enhance mission-critical SDR technology as a Senior FPGA Engineer. Design and validate high-performance FPGA architectures interfacing with rapid IOs and high-speed busses.

This role requires designing, simulating, and implementing FPGA architectures for Software Defined Radios. As a Senior Engineer, you will work on high-speed interfaces, document design changes, and collaborate with team members to overcome challenges. Ideal candidates should possess experience with Verilog or VHDL, and debugging high-speed digital and analog interfaces.

Key Responsibilities:



• Design and simulate FPGA architectures for SDR applications • Validate high-speed data processing over Ethernet and JESD204B/C • Document design updates and communicate effectively with the team • Create and maintain digital test benches for performance assessment • Collaborate with other engineers on integration and debugging

Requirements: • Proficient in Verilog or VHDL and digital test bench creation • Experience with high-speed (>325MSPS) converter interfaces • Knowledge of DDR3/4 memory controller integration • Familiarity with Linux-based systems and C/C++ usage • Proven experience in FPGA integration with SoC devices

Utilize your FPGA and digital design expertise to drive innovation in software-defined radio technologies. #J-18808-Ljbffr

📌 Senior FPGA Engineer for Software Defined Radios (Winnipeg)
🏢 Per Vices
📍 Winnipeg