Elevate your career as a Principal Engineer focusing on Memory PHY and SerDes Architecture in a remote role available anywhere in Canada or the U.S. Lead critical design processes without hands-on circuit responsibilities.

Our client seeks a highly technical Principal Engineer/Technical Lead with expertise in Memory PHY, SerDes PHY, and mixed-signal design. While not a hands-on circuit design position, your architectural leadership will guide PHY IP, SoC integration, validation, and production. Collaborate with SoC teams and stakeholders to ensure technical excellence in performance, power, and area optimization.

Key Responsibilities:
• Own technical direction of Memory/SerDes PHY IP
• Lead architecture and specification through SoC integration




• Drive PPA trade-off decisions for performance
• Provide leadership in signal and power integrity
• Define and review IP specifications and integration needs

Requirements:
• Deep knowledge of Memory PHY and SerDes PHY architecture
• Robust evaluation skills for PPA trade-offs
• Experience in defining technical specifications
• Understanding of SoC integration processes
• B.S./M.S. in Electrical Engineering preferred

Take your technical leadership to the next level with advanced semiconductor technology and unique PHY IP applications.
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📌 Principal Engineer for Memory/SerDes Architecture (Ontario)
🏢 TALENT TO HIRE
📍 Ontario