Memory Subsystem Verification Engineer (Vancouver)

Memory Subsystem Verification Engineer (Vancouver)

18 Oct
|
QUALCOMM
|
Vancouver

18 Oct

QUALCOMM

Vancouver

Qualcomm Canada ULC is seeking a motivated and experienced Design Verification Engineer to join its memory subsystem verification team. The role focuses on developing verification strategies for complex digital designs, including memory controllers, DDR/LPDDR/HBM interfaces, PHY‑related logic, and high‑performance memory subsystems.

Replacement Position.

This role involves full verification lifecycle: plan development, UVM‑based testbenches, assertions, simulations, debugging failures, and

📌 Memory Subsystem Verification Engineer (Vancouver)
🏢 QUALCOMM
📍 Vancouver

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