Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. The Wavelogic family of products are widely used in Ciena’s optical fiber transmission solutions and are one of the main contributors to Ciena’s success in the telecommunications industry. To further strengthen our team, we are looking for an enthusiastic digital design engineer who will be involved in the design of these products, working within a team of digital design engineers, verification engineers and architects. Your role as a senior digital design engineer will be to propose innovative solutions, in order to design power and area optimized functional blocks for the Wavelogic family of products. As a senior digital design engineer, you are expected to read and understand the architecture and functional requirements specification document(s) and communicate and collaborate with systems engineers and architects. You will produce an implementation specification document and have it reviewed by your team, architects, analog designers if applicable. You are held responsible for designer testing of your code as well as debugging of your code during simulation and regression verification. You will assist the verification team in determining coverage and provide design assertions and waivers as needed. You are held responsible for crafting timing constraints for your code, and will participate in synthesis log reviews, constraint reviews,



timing report analysis, layout and backend reviews. Electrical or computer engineering, or other applicable scientific degree at the BEng/BSc or MEng/MSc level
Experience: 5+ years using System Verilog for design
Experience: 5+ years running digital design synthesis, STA, timing closure and asynchronous clock crossings
Ability to methodically solve complex technical problems
Excellent organization, written and oral (English) communication skills
Familiarity with digital (including formal) verification methods
Good understanding of timing/power/area analysis and trade-offs
Assets:
Experience with digital silicon design backend process
Experience with digital design for low power
Experience with using Jira for schedule planning, assignment tracking and bug reporting
Familiarity with programming languages such as Python, Make, bash.
The annual pay range for this position is $109,000 - $174,000 CAD.
#Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission.
medical, dental, and vision plans
Employee Assistance Program (EAP)
company-paid holidays
vacation time
We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.
At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.
Ciena values the diversity of its workforce and respects its employees as individuals.
Ciena is an Equal Prospect Employer, including disability and protected veteran status.

📌 Senior Flexible Design Engineer (Ottawa)
🏢 Ciena
📍 Ottawa