Elevate your career as the Design Verification Engineer Lead at AMD in Markham, ON. Leverage your expertise with advanced verification methodologies to deliver cutting-edge FPGA and ASIC solutions.As the Design Verification Engineer Lead in AMD’s AECG Group, you will play a pivotal role in defining and verifying next-generation IP solutions, including PCIe and CXL-based technologies. Collaborate closely with architecture, IP design, and firmware teams to ensure first-pass silicon success. Your strong analytical skills and passion for complex IP architectures will drive impactful technological advancements.Key Responsibilities:
- Collaborate to define and verify high-speed connectivity features
- Develop comprehensive verification plans addressing hardware/software integration




- Design UVM verification environments with monitors and components
- Conduct tests and debug failures for functional coverage
- Drive automation and efficiency with AI-assisted toolsRequirements:
- Experience with ASIC/IP verification and UVM methodology
- Robust skills in System Verilog, Verilog, and object-oriented programming
- Knowledge of high-speed protocols like PCIe and CXL
- Proficient in Python, Perl, or similar scripting languages
- Educational background in Electrical Engineering or Computer ScienceLead the verification of innovative technologies ensuring quality and efficiency in AMD's groundbreaking projects.#J-18808-Ljbffr

📌 Design Verification Engineer Lead At Amd (Markham)
🏢 Advanced Micro Devices
📍 Markham