Join Ethernovia, Inc. as a Remote Senior ASIC Design Verification Engineer focusing on automotive communication semiconductors. Collaborate with architects and designers to validate next-gen technology.
In this strategic role, you will lead verification efforts, ensuring the integrity of digital SoC designs. Leverage your 10+ years of ASIC verification experience, utilizing tools like Verilog, UVM, and Python. Foster a cohesive team environment as you tackle complex verification challenges and drive project success.
Key Responsibilities:
• Lead all digital SoC verification processes
• Collaborate with architects, designers, and software engineers
• Execute coverage analysis and gate-level simulation
• Diagnose simulation failures to identify root causes
• Contribute to a positive, integrity-driven team workplace
Requirements:
• BS/MS in Electrical Engineering or related field
• Minimum 10 years ASIC verification experience
• Proficient in Verilog/System Verilog, UVM, Python
• Strong knowledge of full verification flow
• Self-motivated with effective teamwork skills
Drive cutting-edge designs from concept to silicon at Ethernovia and elevate your career in a pioneering environment.
#J-18808-Ljbffr