Lead Asic Design Engineer — Ai-Optimized Soc Ip (Markham)

Lead Asic Design Engineer — Ai-Optimized Soc Ip (Markham)

16 Oct
|
AMD
|
Markham

16 Oct

AMD

Markham

AMD's IOHUB team is seeking a Principal ASIC Design Engineer to provide technical leadership for next-generation IP development across server, data center, client, and embedded markets. You will shape architectures, mentor engineers, and drive design strategies that enable AI-driven data movement and high-performance silicon.As a senior technologist, you will collaborate with architecture, verification, firmware, and product teams to turn requirements into robust silicon solutions, uphold#J-18808-Ljbffr

📌 Lead Asic Design Engineer — Ai-Optimized Soc Ip (Markham)
🏢 AMD
📍 Markham

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