Elevate your career as the Design Verification Engineer Lead at AMD in Markham, ON. Leverage your expertise with advanced verification methodologies to deliver cutting-edge FPGA and ASIC solutions.

As the Design Verification Engineer Lead in AMD’s AECG Group, you will play a pivotal role in defining and verifying next-generation IP solutions, including PCIe and CXL-based technologies. Collaborate closely with architecture, IP design, and firmware teams to ensure first-pass silicon success. Your robust analytical skills and passion for complex IP architectures will drive impactful technological advancements.

Key Responsibilities:
• Collaborate to define and verify high-speed connectivity features
• Develop comprehensive verification plans addressing hardware/software integration




• Design UVM verification environments with monitors and components
• Conduct tests and debug failures for functional coverage
• Drive automation and efficiency with AI-assisted tools

Requirements:
• Experience with ASIC/IP verification and UVM methodology
• Strong skills in SystemVerilog, Verilog, and object-oriented programming
• Knowledge of high-speed protocols like PCIe and CXL
• Proficient in Python, Perl, or similar scripting languages
• Educational background in Electrical Engineering or Computer Science

Lead the verification of innovative technologies ensuring quality and efficiency in AMD's groundbreaking projects.
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📌 Design Verification Engineer Lead at AMD (Ontario)
🏢 Advanced Micro Devices
📍 Ontario