System-Level Memory IP Validation Engineer (Quebec City)

System-Level Memory IP Validation Engineer (Quebec City)

15 Oct
|
Synopsys
|
Quebec City

15 Oct

Synopsys

Quebec City

Synopsys Inc. is seeking a System Level Test Engineer in the Ottawa area to own memory interface IP validation (DDR, LPDDR, HBM) in the lab. You will bring up silicon, validate training, and characterize margins across PVT corners, with hands-on work on scopes, analyzers, and automated pipelines.
You will collaborate with firmware and design teams, write plans and reports, and support customer deployments. The role emphasizes rapid problem-solving and reproducible validation in a dialog with IP

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📌 System-Level Memory IP Validation Engineer (Quebec City)
🏢 Synopsys
📍 Quebec City

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