Pre Silicon Verification Engineer Systemverilog/uvm Markham

Pre Silicon Verification Engineer Systemverilog/uvm Markham

14 Oct
|
MaC VC
|
Markham

14 Oct

MaC VC

Markham

Qualcomm Canada ULC is seeking an ASIC verification engineer to contribute to the full verification lifecycle from concept through to tape-out and post-silicon support. You will perform pre-silicon test planning for digital power IPs and develop testbenches using System Verilog-UVM.

The role requires 2+ years of ASIC design/verification experience or a robust current-grad with relevant co-op/PEY exposure, plus proficiency in System Verilog, Verilog, and UVM.
J-18808-Ljbffr

📌 Pre Silicon Verification Engineer Systemverilog/uvm Markham
🏢 MaC VC
📍 Markham

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: pre silicon verification engineer systemverilog/uvm markham / markham

Subscribe to this job alert:

Get the latest job offers by email for: pre silicon verification engineer systemverilog/uvm markham / markham