Qualcomm Canada ULC is seeking an ASIC verification engineer to contribute to the full verification lifecycle from concept through to tape-out and post-silicon support. You will perform pre-silicon test planning for digital power IPs and develop testbenches using SystemVerilog-UVM. The role requires 2+ years of ASIC design/verification experience or a robust new-grad with relevant co-op/PEY exposure, plus proficiency in SystemVerilog, Verilog, and UVM.