Design Verification Engineer - ASIC, SystemVerilog/UVM (Markham)

Design Verification Engineer - ASIC, SystemVerilog/UVM (Markham)

13 Oct
|
Qualcomm
|
Markham

13 Oct

Qualcomm

Markham

Qualcomm Canada ULC is seeking an ASIC verification skilled to drive pre-silicon test planning for digital power IPs, build testbenches, and develop coverage and formal verification environments. You will work with SystemVerilog-UVM and UPF flows while contributing to automation efforts to improve verification efficiency.

The role targets candidates with a Bachelor's in Engineering or Science and 2+ years in ASIC design/verification, with preferred Master’s or PhD for advanced positions.

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📌 Design Verification Engineer - ASIC, SystemVerilog/UVM (Markham)
🏢 Qualcomm
📍 Markham

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