Schweitzer Engineering Laboratories (SEL) seeks a Lead Engineer specializing in VHDL Register-Transfer Level (RTL) Digital Logic design. This on-site role in Burnaby focuses on developing advanced communication products. As a key player in the R&D; Communications team, you will lead technical efforts on complex VHDL RTL digital logic projects.

Your tasks will include creating RTL design documentation, writing test plans, and preparing specifications to ensure robust product development. Collaborate closely with cross-discipline teams and product managers to innovate and improve products for critical infrastructure. Key Responsibilities:

- Lead complex VHDL RTL projects from inception to completion
- Maintain accurate internal RTL design documentation




- Develop test plans and test harnesses for functional verification
- Prepare design and system-level specifications
- Collaborate on new product concepts and enhancements Requirements:
- B.S. in Electrical Engineering or related field
- 5+ years of experience in RTL Digital Design with FPGAs
- Proficient in firmware design using C/C++
- Robust documentation and communication skills
- Ability to mentor and lead teams Utilize your expertise in VHDL and FPGA design to enhance communication solutions at SEL in Burnaby.

📌 Lead Engineer VHDL Digital Logic (Burnaby)
🏢 Schweitzer Engineering Laboratories
📍 Burnaby