Lead transformative digital design projects as a Senior Manager at Synopsys. Oversee high-performance SERDES PHY IP solutions, collaborating cross-functionally in a dynamic and innovative environment.

At Synopsys, we are at the forefront of semiconductor innovation. We seek a visionary leader with over 15 years of experience in technical development and a solid background in Verilog design. You will inspire and guide a diverse team through complex digital projects, ensuring excellent product quality and customer satisfaction.

Key Responsibilities: • Lead a team in developing SERDES PHY IP solutions • Collaborate with architects and verification teams • Plan and drive SERDES PHY IP design phases • Mentor and develop team members for growth • Engage with customers to ensure IP integration success

Requirements: • Bachelor’s in Electrical Engineering • 15+ years in complex technical development • Minimum 2 years’ in people management • Strong Verilog and front-end design flow expertise • Excellent communication and collaboration skills

Make a significant impact on the future of semiconductor technologies at Synopsys. #J-18808-Ljbffr

📌 Senior Manager of Digital Design at Synopsys (Winnipeg)
🏢 Synopsys
📍 Winnipeg