Senior ASIC Verification Engineer (SystemVerilog & UVM) (Montreal)

Senior ASIC Verification Engineer (SystemVerilog & UVM) (Montreal)

12 Oct
|
TSMC - Taiwan Semiconductor Manufacturing Company
|
Montreal

12 Oct

TSMC - Taiwan Semiconductor Manufacturing Company

Montreal

TSMC Design Technology Canada Inc. (TDTC) in Ottawa is seeking a Digital Verification Engineer to validate digital circuits, develop test benches and perform functional verification for manufacturing/tester patterns. The candidate will contribute to verification methodology customization and help improve the group’s EDA capabilities, working with Synopsys VCS or Cadence Incisive in a Unix/Linux workplace.

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📌 Senior ASIC Verification Engineer (SystemVerilog & UVM) (Montreal)
🏢 TSMC - Taiwan Semiconductor Manufacturing Company
📍 Montreal

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