Lead ASIC Design Engineer — AI-Optimized SoC IP (Ontario)

Lead ASIC Design Engineer — AI-Optimized SoC IP (Ontario)

12 Oct
|
AMD
|
Ontario

12 Oct

AMD

Ontario

AMD's IOHUB team is seeking a Principal ASIC Design Engineer to provide technical leadership for next-generation IP development across server, data center, client, and embedded markets. You will shape architectures, mentor engineers, and drive design strategies that enable AI-driven data movement and high-performance silicon.
As a senior technologist, you will collaborate with architecture, verification, firmware, and product teams to turn requirements into robust silicon solutions, uphold

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📌 Lead ASIC Design Engineer — AI-Optimized SoC IP (Ontario)
🏢 AMD
📍 Ontario

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