Qualcomm Canada ULC is seeking a Senior FPGA/ASIC Design Verification Engineer to innovate cutting-edge technology. Collaborate across teams to optimize and validate high-performance designs in a hybrid work setting.

In this position, you will leverage your expertise in ASIC and FPGA development to lead projects crucial for future communication systems. The role requires a strong background in verification environments, particularly using SystemVerilog and UVM, to develop standards-compliant IP blocks. You will also mentor junior engineers and manage bug reports to ensure project integrity and excellence.

Key Responsibilities:
• Lead FPGA/ASIC projects for OTN and Ethernet
• Develop verification environments using SystemVerilog + UVM
• Streamline ASIC development processes with advanced tools




• Execute and document individual test cases against RTL
• Track and manage bug reports collaboratively

Requirements:
• MSc/MEng with 5+ years or BSc/BEng with 7+ years in ASIC/FPGA
• Solid knowledge of Verilog, SystemVerilog, simulation tools
• Expertise in communication protocols like Ethernet
• Proficient in Unix/Linux Shell scripting
• Familiarity with source code revisioning systems

Bring your verification expertise and problem-solving skills to Qualcomm's engineering team and significantly impact next-gen technologies.
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📌 Senior FPGA/ASIC Design Verification Engineer (Quebec City)
🏢 QUALCOMM
📍 Quebec City