Engineering Group, Engineering Group ASICS Engineering As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products.
Replacement Position
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.ORMaster's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.ORPhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. We are seeking a Senior Staff Design Verification Engineer to lead verification architecture and execution for DSP products, high-speed SerDes integration, full-chip SoC verification, and pre-silicon ATE functional test validation. This role will drive verification closure from test planning and UVM environment development through production-oriented ATE vector signoff and post-silicon bring-up support.
Lead verification of DSP functionality, datapaths, control logic, configuration, performance modes, error handling, and system-level integration.
Verify
SerDes integration, including calibration flows,
CDR/PLL control, equalization, lane configuration, deskew, loopback, and digital interface behavior. Own SoC-level verification planning and closure for reset/boot flows, clocking, power states, interrupts, CDC/RDC, register access, and high-speed datapaths. Lead ATE functional test development across DSP, SerDes, SoC, and related hardware subsystems, including simulation, debug, qualification, and production vector signoff.
Partner with Design, DFT, Firmware, Silicon Validation, Product Engineering, and ATE teams to transition test content from simulation to silicon and production environments. Provide technical leadership, mentor engineers, and improve regression efficiency, automation, and debug methodologies. 10+ years of ASIC/SoC design verification experience. ~ Experience verifying DSP products, complex SoC subsystems, full-chip integration, and high-speed interfaces. ~ Strong understanding of SerDes digital integration, including PMA/PCS interfaces, calibration, training, equalization, clocking, resets, and lane management. ~ Experience developing or validating functional test content for ATE, production test, silicon bring-up, or post-silicon validation.
~ Robust scripting and automation skills using Python, Perl, Bash, Make, or similar tools. ~ Proven ability to lead technical execution across cross-functional and geographically distributed teams.
Experience with DSP architectures, signal-processing datapaths, communications products, or high-throughput data processing blocks. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail
[email protected] request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.
Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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📌 Design Verification Engineering (Toronto)
🏢 Qualcomm
📍 Toronto