03 Oct
|
Ciena
|
Mississauga
Accelerate your validation skills as a Senior ASIC Verification Engineer at Ciena in Kanata. This role focuses on innovative verification strategies for the Wavelogic product family in the telecommunications sector. Ciena seeks a motivated engineer to join its verification team.
In this full time position, you will collaborate with digital design engineers and architects to validate architectural functional blocks through simulations. The ideal candidate will possess strong problem-solving skills and familiarity with formal verification methods, ensuring Ciena's high-speed connectivity advancements. Key Responsibilities:
- Propose innovative verification strategies for Wavelogic products
- Create effective testbench environments using System Verilog UVM
- Validate architectural blocks through simulations and formal methods
- Collaborate with systems engineers to meet functionality requirements
- Monitor regressions, debug failures, and report status updates
Requirements:
- BEng/BSc or MEng/MSc in Electrical/Computer Engineering
- Experience with programming languages: C, C++, Python
- Familiar with standards like OTN and Ethernet
- Strong organizational and interpersonal skills
- Self-starter with a teamwork mentality
Join Ciena and contribute to shaping the networking future in telecommunications.
📌 Onsite Senior ASIC Verification Engineer (Mississauga)
🏢 Ciena
📍 Mississauga