Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018, the company’s breakthrough data transport and acceleration technology is ushering in a new era of connectivity and capabilities in the vehicle and at the edge, including highly reliable autonomy, over-the-air servicing and AI-backed applications.

Ethernovia's co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds’ leading technology investors, having secured $Porsche SE, Qualcomm, AMD, Western Digital, Maverick Silicon, Socratic Partners, Conduit Capital, and CDIB-TEN Capital)

Ethernovia has been recognized in EE Times' prestigious list of the Top 100 Startups for 2025.

Join Ethernovia’s team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles, robots and intelligent machines. As a Senior ASIC(Front End) Design Engineer,



you will be responsible for all aspects of digital SoC design , from micro-architecture specification, RTL, verification, synthesis, lint, CDC, LEC, and static timing analysis to deliver a design meeting target power, performance, and area goals.

Work with system architects, software, hardware, and verification engineers to plan, architect, design, implement, and deliver advanced automotive communication semiconductors and systems .

development and definition of advanced, high-performance custom silicon ASIC's internal and external interactions, data flow, processing algorithms across a number of disciplines, resource management, and software interfaces.

BS and/or MS in Electrical Engineering, Computer Science, or related field

Minimum 10+ years of ASIC RTL design digital design fundamentals Networking (Digital signal processing filters

Digital Mixed-Signal modeling, design, and integration

Video standards, protocols, processing

Perl, TCL, C/C++, Make

Personal Skills: Collaboration across multidisciplinary and international teams.

Flexible schedule

Medical, dental and vision insurance for employees

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📌 Senior ASIC (Front End) Design Engineer (Toronto)
🏢 Ethernovia
📍 Toronto