Senior SoC Design Engineer - RTL/Verilog for High-Perf (Vancouver)

Senior SoC Design Engineer - RTL/Verilog for High-Perf (Vancouver)

03 Oct
|
FHLB Des Moines
|
Vancouver

03 Oct

FHLB Des Moines

Vancouver

Microchip Technology Inc. in Burnaby, BC, Canada, is seeking a Senior Engineer I-Design to contribute to its Data Center Solutions unit. You will work on SAS/PCIe/NVMe/CXL products, connect and secure information, and collaborate across teams in a fast-paced workplace.

You will design complex digital ICs, participate in verification flows, and engage with architects to justify trade-offs while advancing the industry’s technology leadership.

📌 Senior SoC Design Engineer - RTL/Verilog for High-Perf (Vancouver)
🏢 FHLB Des Moines
📍 Vancouver

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