We are seeking a Custom Analog Layout Engineer / Physical Design Engineer to join an IP development team focused on advanced semiconductor technologies.

In this role, you will develop custom high-speed analog and mixed-signal layouts supporting industry-leading SerDes designs on advanced technology nodes. You will collaborate with design engineers, layout and mask design professionals, and cross-functional teams across multiple locations to deliver accurate, high-quality physical designs.

Location: Toronto, ON, Canada

Work Model: Hybrid - primarily work from home with 1-2 days per week onsite

Schedule: Monday-Friday, 8:00 AM-5:00 PM

Pay Rate: $46.50/hour

Laptop Provided

Key Responsibilities

- Develop cell-, block-, and macro-level full-custom analog and mixed-signal layouts.
- Perform floorplanning and layout implementation for high-speed analog circuits.
- Create layouts that meet DRC and LVS verification requirements.
- Perform RC extraction and analyze layout parasitics to identify and resolve complex design issues.
- Conduct electromigration (EM) analysis and implement design improvements.
- Optimize layouts for performance, reliability, manufacturability, and design-rule compliance.
- Troubleshoot and resolve complex physical design challenges.
- Contribute to the development and improvement of layout methodologies,



workflows, and design efficiencies.
- Collaborate with local and remote design engineers, mask designers, and layout teams.
- Provide project status and schedule updates to engineers and managers.
- Deliver disciplined, accurate, and high-quality results in a multi-site engineering workplace.

Minimum Qualifications

- Bachelor’s degree in Electrical Engineering.
- Strong understanding of:
- High-speed custom layout
- Floorplanning
- RC extraction
- Layout optimization
- Physical verification
- DRC/LVS
- Ability to independently troubleshoot and resolve complex layout-related issues.
- Ability to collaborate effectively with distributed engineering teams.
- Ability and willingness to work onsite in Toronto 1-2 days per week.

Preferred Qualifications

Experience or knowledge in one or more of the following areas is highly desirable:

- SerDes or other high-speed analog circuit layouts
- Electromigration (EM)
- Design for manufacturability (DFM)
- Lithography considerations
- Semiconductor manufacturing challenges
- Advanced technology nodes
- UNIX scripting and debugging

Please note:

Only candidates who can work onsite in Toronto 1-2 days per week will be considered.

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📌 Custom Analog Layout Engineer (ASIC Physical Designers – I) (Toronto)
🏢 KellyOCG
📍 Toronto