Senior I/O Chiplet Verification Engineer (SystemVerilog/UVM) (Ottawa)

Senior I/O Chiplet Verification Engineer (SystemVerilog/UVM) (Ottawa)

02 Oct
|
Btadesignservices
|
Ottawa

02 Oct

Btadesignservices

Ottawa

BTADesignServices in Ottawa, Canada, is seeking a Senior I/O Chiplet Verification Engineer to lead verification of high-speed chiplet interfaces and die-to-die interconnects.

You will design verification plans, develop SystemVerilog/UVM environments, and collaborate with architecture, RTL, firmware, and IP partners to achieve sign-off with thorough coverage across protocols and reset/latency requirements.

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📌 Senior I/O Chiplet Verification Engineer (SystemVerilog/UVM) (Ottawa)
🏢 Btadesignservices
📍 Ottawa

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