AMD in Vancouver is seeking a Digital Design Engineer to help develop PCIe IP for server, client, GPU products. You will contribute to RTL design, architecture definitions, and bring-up from concept to silicon, collaborating with a global team.
The role emphasizes timing, power, verification collaboration, and adherence to design methodologies. A solid background in Verilog/SystemVerilog and multi-clock domains helps.
📌 Pcie Rtl Design Engineer — Hybrid Vancouver Winnipeg
🏢 AMD
📍 Winnipeg