Elevate your career by joining Lightmatter as a Design Verification Engineer. Work with cutting-edge technologies in a hybrid setup while ensuring the optimum performance of innovative photonics designs.
As a key member of Lightmatter's dynamic team, you will collaborate closely with digital and analog design experts using UVM testbench techniques. Your expertise will drive the verification of complex designs while gaining insights into photonics and analog principles. The role emphasizes emulation, mixed-signal verification, and the use of Real Number Modeling methods to maintain design integrity.
Key Responsibilities:
• Define DV methodologies for integrated digital and analog devices
• Create and execute high-quality test plans for performance goals
• Collaborate on defining validation flows with cross-functional teams
• Develop reusable test bench components for effective verification
• Ensure DV signoff requirements with a focus on high coverage metrics
Requirements:
• Bachelor’s degree in Electrical Engineering or related field
• Minimum 8 years in design verification and SystemVerilog
• 2+ years of Python experience
• Expertise with UVM library development
• Familiarity with simulators like Xcelium or ModelSim
Join Lightmatter and contribute your skills to revolutionize AI infrastructure.
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