Advance your expertise as a Low Power Signoff Lead Engineer at AMD. Drive Low Power Static Verification and Logical Equivalence Check (LEC) in SoC designs, ensuring high performance across all stages.

As a technical lead, you will own the entire LEC signoff chain from RTL to GDS-level netlist. This role requires a self-driven leader to manage small teams effectively and ensure timely task completion with minimal supervision. Key responsibilities include debugging logical equivalence issues, guiding team strategies, and leveraging industry-leading EDA tools.

Key Responsibilities:
• Lead and manage the full LEC signoff process
• Drive low power static checks during the SoC design flow
• Debug logical equivalences in synthesis and PnR flows




• Oversee task delivery and team milestone tracking
• Guide members on LEC strategies and design changes

Requirements:
• Solid leadership and problem-solving skills
• Hands-on experience with Synopsys and Cadence tools
• Excellent communication and teamwork capabilities
• Solid understanding of low power design methodologies
• Proficiency in scripting languages like Tcl, Perl, Python

This role is ideal for candidates ready to tackle the challenges of SoC verification and achieve impactful results at AMD.
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📌 Low Power Signoff Lead Engineer at AMD (Ontario)
🏢 Advanced Micro Devices
📍 Ontario