Formal Signoff Verification Engineer (Quebec City)

Formal Signoff Verification Engineer (Quebec City)

30 Sep
|
Amalent
|
Quebec City

30 Sep

Amalent

Quebec City

Amalent is a world-class formal verification engineering services company. Using the functional verification process of formal signoff, we help semiconductor development teams to deliver the maximum possible design quality in the shortest amount of time.

The Role
At Amalent, we work with industry-leading silicon design teams on cutting-edge designs. We are looking for Verification Engineers to join us, supporting clients across a wide range of design applications such as CPU (including RISC-V), GPU, AI, networking and wireless communications.

This is an exciting opportunity to work with some of the semiconductor industry's most cutting-edge companies, while delivering functional verification using advanced formal methodologies. The ideal candidate is someone who is passionate about design verification, with a high-level of attention to detail and strong debugging and problem-solving skills.

What You'll Do

Develop and implement formal verification (FV) test plans for client projects

Collaborate with client design and verification engineers to understand design requirements, review test plans and confirm formal verification results

Prepare and document comprehensive test plans, including properties to verify, constraints to use, coverage goals to measure and abstraction techniques to deploy

Develop formal signoff testbenches using SystemVerilog (SV) and SystemVerilog Assertions (SVA)

Work with state-of-the-art formal verification tools to prove compliance with design requirements and find design bugs

Prepare progress reports and end-of-project presentations, tailored for engineering and management audiences

What You'll Need to Succeed





Minimum 2 years of experience in a functional verification or design role within a semiconductor development team

Strong understanding of digital design techniques and RTL coding styles

Aptitude for bug finding and the tenacity to find every bug in a design

Deep knowledge of coding with SystemVerilog, especially RTL constructs and SystemVerilog Assertions

Exceptional analytic skills, with the ability to understand, break down and solve complex problems

Strong organizational and project management skills, with the ability to prioritize and manage multiple tasks

You must be legally authorized to work in Canada.

You will work onsite at Amalent headquarters in Ottawa.

Amalent is committed to providing an inclusive, barrier-free recruitment process. If you require accommodations at any stage of the application or hiring process, please notify us when applying, and we will work with you to meet your needs.

Why Join Us
At Amalent, you'll be part of a collaborative and dynamic team that is at the forefront of formal verification in the industry.

the opportunity to work on high-impact verification projects for some of the most advanced technology programs in the semiconductor industry

exposure to a wide range of design application areas

development of highly valuable skills in formal verification signoff methodology

career growth and mentorship from leading formal verification industry experts

You will join a highly motivated group of engineers who are united in our goal of enabling our clients to achieve new heights in efficient and effective functional verification.

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📌 Formal Signoff Verification Engineer (Quebec City)
🏢 Amalent
📍 Quebec City

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