Kepler Communications in Toronto is seeking an FPGA Digital Designer Engineer Intern to contribute to RTL code for SDR and satellite systems, and to design custom IP for recent features. You’ll work with high-speed FPGA interfaces and gain mentorship while building real satellites. Applicants should be pursuing an Electrical or Computer Engineering degree in Canada, with 2+ years in the program, available for 4–16 months starting January 2027, and ideally able to be on-site 2–3 days per week in