Ciena Corporation in Ottawa is seeking a Senior Physical Design Engineer to drive physical implementation of large mixed-signal SoC ASICs targeting advanced nodes. You will lead placement, routing, power grid design, clock distribution, and signoff quality through PPA-focused optimization.
Collaborate with RTL and analog teams, run STA and timed ECOs, explore trade-offs, and write scripts to automate backend flows.
📌 Senior Physical Design Engineer Soc Ppa & Timing Expert Ottawa
🏢 Ciena
📍 Ottawa