Senior I/O Chiplet Verification Engineer (SystemVerilog/UVM) (Ahuntsic)

Senior I/O Chiplet Verification Engineer (SystemVerilog/UVM) (Ahuntsic)

27 Sep
|
Btadesignservices
|
Ahuntsic

27 Sep

Btadesignservices

Ahuntsic

BTADesignServices in Ottawa, Canada, is seeking a Senior I/O Chiplet Verification Engineer to lead verification of high-speed chiplet interfaces and die-to-die interconnects.

You will design verification plans, develop SystemVerilog/UVM environments, and collaborate with architecture, RTL, firmware, and IP partners to achieve sign-off with thorough coverage across protocols and reset/latency requirements.

📌 Senior I/O Chiplet Verification Engineer (SystemVerilog/UVM) (Ahuntsic)
🏢 Btadesignservices
📍 Ahuntsic

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: senior i/o chiplet verification engineer (systemverilog/uvm) (ahuntsic) / ahuntsic

Subscribe to this job alert:

Get the latest job offers by email for: senior i/o chiplet verification engineer (systemverilog/uvm) (ahuntsic) / ahuntsic