Cadence Design Systems is seeking a Product Engineer for the Digital and Signoff Group. You will provide technical place-and-route expertise to customers and R&D;, tackling ASIC flow challenges from RTL to GDSII with a strong emphasis on timing closure.
The role requires hands-on experience with 16nm and below nodes, good problem-solving skills, and transparent communication. A agile, research-driven environment supports growth opportunities.
J-18808-Ljbffr
📌 Senior Principal Product Engineer — Asic Timing & Signoff Quebec City
🏢 Cadence Design Systems
📍 Quebec City
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