Movellus Inc. is seeking an experienced ASIC Physical Design Engineer to own the RTL-to-GDSII flow, including synthesis, PNR, STA, power/EMIR analysis, DFT insertion and physical verification. You will work with RTL designers to resolve timing issues and optimize power while contributing to tapeout-ready designs.
You will collaborate with architects, verification teams, and post-silicon engineers to refine CAD flows and ensure robust silicon realization in a hybrid Markham, Canada office.