25 Sep
|
CELERO COMMUNICATIONS
|
Vancouver
25 Sep
CELERO COMMUNICATIONS
Vancouver
Shape the future of AI with a Principal SerDes Design Engineer role, focused on high-speed interconnect technologies and next-gen transceiver architecture. Make an impact in a cutting-edge field.In this senior position, you will define the architecture and specifications for next-generation SerDes and lead the design of critical blocks. Your expertise will involve overseeing system-level modeling with advanced tools such as MATLAB and SystemVerilog, and designing high-performance analog/mixed-signal circuits in advanced node technologies.Key Responsibilities:Define architecture and circuit topologies for SerDesOversee system-level modeling and behavioral analysisDesign analog/mixed-signal circuits at advanced nodesManage the design of RX/TX equalization circuitsLead lab validation and characterization of SerDes IPsRequirements:Master's or PhD in Electrical Engineering10+ years of SerDes design experienceProven record in high-speed design tape-outExtensive background in advanced node technologiesStrong cross-functional collaboration and communication skillsBring your cutting-edge design skills and experience to deliver transformative SerDes solutions in this Principal role.
📌 Lead Serdes Designer For Ai Technology (Vancouver)
🏢 CELERO COMMUNICATIONS
📍 Vancouver