25 Sep
|
FHLB Des Moines
|
Burnaby
25 Sep
FHLB Des Moines
Burnaby
Become a Senior SoC Design Engineer at Microchip Technology in Burnaby, BC, where innovation meets chance! Contribute to the design of advanced integrated circuits using your skills in Verilog and System Verilog.At Microchip's Data Center Solutions unit, we're looking for professionals with 3 to 5 years in RTL design to join our team. In this role, you'll focus on the design of digital integrated circuits, while ensuring alignment with key protocols. Quality communication and collaboration with architects and design teams will be essential to your success as you navigate complex technology solutions.Key Responsibilities:Design multi-million-gate digital integrated circuitsDefine and document subsystem/block featuresSupport ASIC validation and perform debuggingCommunicate designs and progress with key teamsAnalyze and understand interface protocol standardsRequirements:Degree in Electrical/Computer Engineering3 to 5 years related RTL Design experienceKnowledge of ASIC design methodologiesFamiliarity with various design toolsExcellent teamwork and analytical skillsShape your engineering career at Microchip, where your contributions matter.
📌 Soc Design Engineer Role At Microchip (Burnaby)
🏢 FHLB Des Moines
📍 Burnaby